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  • ABB KUC755AE105 3BHB005243R0105 Excitation module
ABB KUC755AE105 3BHB005243R0105 Excitation module

ABB KUC755AE105 3BHB005243R0105 Excitation module

ABB KUC755AE105 3BHB005243R0105 Excitation module

Mechanical reset key: When enabled and toggled, it instantaneously affects the system by generating a system reset. As the FGA-002 drives APN_BRES, the whole APNbus system is reset.

Mechanical abort key: When enabled and toggled, it instantaneously affects the system by generating an interrupt. FGA-002 allows disabling of Interrupt-generation and also mapping of ABORT-key interrupt to any CPU-interrupt level.Software readable hexadecimal rotary switch, decoded with 4 bits. The status of the rotary switch can be read by reading the upper nibble of port A of CIO#1. Default setting: F.

Serial I/O Ports 

The SYS68K/CPU-30SEN-R has 2 serial I/O ports available on the front panel. Port #1 is available via a 9-pin D-Sub connector and port #2 is available on a special 12-pin header. Both ports support RS-232. Default configuration RS-232 asynchronous – 9600 Baud, 8 data bit, 1 stop bit, no parity (when booting with VMEPROM).The MB87033/34 provides an 8-bit single-ended SCSI interface. It is routed to the APNbus jack 1 and jack 3 connectors. The termination is switch selectable (see “SW9-2” on page 20) and "TERMPWR" is supported. Note: TERMPWR is always supplied; if termination power is supplied externally by a source other than the APNbus connectors, the active termination is still maintained, although the APNbus may not be powered.

Power On

 Power to the APN rack may be switched on when the board is correctly installed, the switches are in the correct positions, and the terminal is correctly configured and under power. Default boot procedure The setting of the 2 front-panel rotary switches defines the startup: whether VMEPROM or a user program is started. The monitor (VMEPROM) boots up automatically with the default setup of the rotary switches on the front panel. For the default boot procedure set both rotary switches to F. Note: The APNbus interface is configured to be used without any changes. The CPU board is configured as a system controller and arbiter, and the on-board 4-level arbiter is enabled and reacts on every bus request. This results in a default hardware setup which may conflict with other boards installed in the rack.

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