For the initial power up, a terminal has to be connected to the 9-pin D-Sub connector of serial port 1, which is located on the front panel. Both serial ports provide RS-232 interface signals.
1. The terminal must not drive a signal line which is marked to be an output of the CPU board.
2. All signals marked as "Required" must be supported by the terminal to enable transmission.
3. Connect the front-panel 9-pin D-Sub connector to the terminal with a cable which supports all of the required signals which are wired to pin 2 (RxD), 3 (TxD), 5 (GND), 7 (RTS), 8 (CTS).
CPU-30SEN-R501 variant
The SYS68K/CPU-30SEN-R-501 is a special variant of the CPU30SEN-R with mechanical and backplane connector differences as well as additional features. The figure below gives a functional overview.The following table lists the functions and the default settings of all switches shown in figure 5 “Location diagram of the SYS68K/CPU30SEN-R-501” on page 38. With the default switch setting all switches are set to OFF. • Before powering up the board check the current switch settings for consistency. • The battery backup for SRAM and RTC is disabled with the default switch setting. Stored data will be lost if turning off the power (see “SW8-2” on page 41 and see “SW8-3” on page 41). • SW7-4, SW8-1 and SW9-4 are reserved. They must be OFF.
Features of the Front Panel
Mechanical reset key: When enabled and toggled it instantaneously affects the system by generating a system reset. As the FGA-002 drives APN_BRES, the whole APNbus system is reset.Mechanical abort key: When enabled and toggled it instantaneously affects the system by generating an interrupt. FGA-002 allows disabling of Interrupt-generation and also mapping of ABORT-key interrupt to any CPU-interrupt level.Software readable hexadecimal rotary switch, decoded with 4 bits. The status of the rotary switch can be read by reading the lower nibble of port A of CIO#1.
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