ABB 3PHE022287R0001 UCD240A01 Control card

The start address of the System Flash Memory is mapped via the FGA002 Gate Array and cannot be changed. The size of this memory area depends on the memory capacity of the devices used. The following table lists the address map for the usable device types.The Vpp generator is shared between the System Flash Memory, the Boot Flash Memories, the User Flash Memory and the IOC ID-Flash Memory The default configuration uses 28F008SA devices and is provided for programming VMEPROM and user application software.

The Boot Flash Memory

 The CPU board contains two 32-pin PLCC sockets (JEDEC-standard) which are used to assemble up to two byte-wide Boot Flash Memory devices. By default socket #1 (J12) contains FORCE FGA-Boot Software which boots up the processor, initializes register contents of the FGA-002 Gate Array and starts VMEPROM or a User Program in the System Flash Memory. The second socket #2 (J13) enables the assembly of a different Boot Software.

The FGA-Boot program finishes in such a manner

 that the 68030 microprocessor appears to have booted from the System Flash Memory. The Boot PROM devices are located in 32-pin PLCC sockets at location J12 (socket #1) or J13 (socket #2). Because the 68030 will unconditionally boot from the Boot Flash Memory after every power up or reset, there must always be a working Boot Flash Memory device installed in the CPU board. During the bootup procedure, the FGA-002 will map all addresses to the Boot Flash Memory with the exception of FGA-002 internal registers. This enables MC68030 Initial-Programcounter and Initial-Stackpointer fetch (68030 accesses to 0000.000016). After bootup the Boot Flash Memory will be accessible at address FFE0.000016 (socket #1) and FFE8.000016 (socket #2) as by default SW9-1 is OFF. The start address FFE0.000016 of the Boot Flash Memory is fixed and cannot be changed.

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