DEIF IPM-1 Ship control card

When one of the 16 interrupts is activated the FC68165 generates an interrupt on the FLXibus with the programmed priority level. During the IACK-cycle the FC68165 provides the interrupt vector on the FLXibus. The vector is programmable in the FC68165. External I/O devices which are able to provide the vector by themselves are also supported. For each of the external interrupts IRQDEV[0..7], the FC68165 can generate the corresponding interrupt acknowledge signal IACKDEV[0..7]. For detailed information about the interrupt structure of the FC68165 I/O Controller please refer to the I/O Controller (FC68165) User’s Manual. Note: On the CPU-30SEN-R only the SCSI controller and the IOC ID-FLASH are connected to the FC68165. Therefore only the DMA channel #1 is used and only IRQDEV[4] is used as external SCSI interrupt input.

Features of the FC68165 I/O Controller

 • 68020 and 68030 bus master/slave capability 

• 8-bit Local I/O Interface 

• Decoding and IRQ/IACK support for 8 external devices 

• 4-channel DMA controller 

• Four 32-bit timers 

• Cascadability of several FC68165 devices 

• JTAG support

I/O Controller ID-FLASH Memory Device

 The I/O Controller (IOC) ID-FLASH area consists of one 128 KByte * 8 on-board programmable flash memory device with an access time of 150 ns. The IOC ID-FLASH is directly connected to the 8-bit local I/O interface of the I/O Controller (FC68165). Address range of IOC ID-FLASH The IOC ID-FLASH is controlled by the chip select signal #0 (CSDEV0) of the FC68165. The default address range of the IOC ID-FLASH area is located from $FE800000 to $FE81FFFF. The address range is programmable with the help of range register #0 (CSRNG[0]) of the FC68165. For detailed information about programming the address ranges in the I/O Controller (FC68165), please refer to the I/O Controller (FC68165) User’s Manual.

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