DEIF PPM DGM controller module

Features of the SCSI Controller MB87033/34

• Functional superset of the MB87031 SCSI Controller 

• Direct interface to SCSI bus devices with on-chip drivers 

• Full support for SCSI control 

• Service of either initiator or target device 

• Eight byte data buffer register incorporated 

• Transfer byte counter (24 bit) 

• Independent control and data transfer bus 

• Asynchronous data transfer speed of 2 MByte/sec

• Synchronous data transfer speed up to 4 MByte/sec

The SCSI DMA Controller inside FC68165 

The I/O Controller (FC68165) contains a DMA Controller with four DMA channels. The DMA Controller is intended for transferring data between up to four I/O devices on the 8-bit Local I/O Interface and memory on the FLXibus (CPUbus). The transfer rate of the DMA Controller is 12 MByte/sec on the FLXibus and 4 MByte/sec on the 8-bit Local I/O Interface. Each of the four DMA channels has a dedicated DMA request signal. The SCSI controller MB87033/34 uses one of these four DMAchannels for data transfers to and from the DRAM memory allowing data transfer with a maximum speed of 4 MByte/sec on the local side. The four DMA channels are independent of each other and operate time multiplexed.

DMA transfer from Local I/O Interface to FLXibus

 During a DMA transfer from the SCSI controller MB87033/34 to the FLXibus (CPUbus), the DMA Controller first transfers data from the I/O device into the FIFO of the used DMA channel. As soon as two FIFO lines (8 bytes) are occupied, the DMA Controller will request the FLXibus (CPUbus). When the DMA Controller has bus mastership on the FLXibus, it transfers the FIFO contents into the memory on the FLXibus.

Note: On the CPU-30SEN-R only the DMA channel #1 is used. Each of the four DMA channels has a 16-byte FIFO. The FIFOs are organized in four 32-bit lines.

Superior products

Main products include DCS control system spare parts, PLC system spare parts and robot system spare parts,

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Application industry

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