RESET and ABORT via 12-pin front panel header (not on -501-variant) The reset and abort function is also available on the 12-pin front panel header PE2. For the pin assignment on the 12-pin header, please see the installation section of this manaul. 5.12.4 "I 2C" LED (only CPU-30SEN-R-501 Variant) -R-501 This uppermost LED (above the RESET and ABORT switches) is connected to the isolated I2Cbus interface of the CPU-30SEN-R-501 and can therefore be controlled even if the CPU-30SEN-R-501 is not powered on, and only the isolated I2Cbus interface (accessible from a metric backplane connector) is powered on.
The "RUN" LED is bicolor (red and green)
on CPU-30SEN-R, but unicolor (only green) on -501-variant. On the CPU-30SEN-R the uppermost LED (below the RESET and ABORT switches) is the RUN LED. This bicolor LED (not bicolor on - 501-variant) is green when the processor is not in HALT state. It is red during the reset phase, or when the processor is in HALT state.The -501-variant of the CPU-30SEN-R has a different front panel layout. Here the RUN/HALT LED is not a unique bicolor red-green LED, but two LEDs are used instead. The uppermost LED (below the RESET and ABORT switches) is the green RUN LED. Under this RUN LED there is a red HALT LED. Under the HALT LED there is the green EX/BMLED.
"EX/BM" LED
SW7-3 determines if the front panel EX-LED is controlled by CIO #1 PB1 output or if the LED reflects CPU-30SEN-R APNbus master accesses. By default SW7-3 is OFF and therefore the front panel EX-LED can be used as USER-LED, controlled by CIO #1 PB1-output (see “The CIO #1 device” on page 93). If SW7-3 is in position ON, then only if the CPU-30SEN-R board executes APNbus master accesses, the green BM LED is lit. This provides the user with a convenient visual indication of the status of the APNbus.
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