B&R X20CP1586 servo controller

If the RAM is battery–backed and the device assignment has not changed (no interfaces removed/ installed), the cyclic block sequences are restarted and the system interfaces updated (GA. ORPA/ GB. ORPA) after the power supply has been restored. The user blocks are not re–organized. The RESTART system subroutine will always be executed after restart has been completed (cf. Chapter 5.7.2.1, initialization blocks).

Start–up logic for a battery–backed system RAM with the memory module switch in RUN position The “ZRS” signal (central reset), which includes the “PER” signal (peripheral reset), is issued after the power supply has been switched on or the reset button on the control unit module depressed. “PER” only resets the interface modules, apart from the monitor interface, which are installed in the central processor subrack in a basic status. The process I/O interface modules might be affected by “PER” via the “WATCHDOG” reset signal.

After the system has been switched on

 the color display generators are automatically pre–parameterized during the microprogram initialization. A dot is subsequently shown in each character position on the screen. The system initialization program overwrites these dots with blanks. A cursor is not shown. The N8/N–AS interface is in idle state after the system has been switched on or after “PER”. Since it does not know any main memory addresses it does not perform any DMA activities. The operating system parameterizes the N8/N–AS interface. After the the control block starting address has been transferred, the N8/N–AS interface itself initiates direct memory access to the main memory

Parameterization 

activation of the serial interfaces is performed by command transfer after a central initiative. After parameterization has been completed, data requests from the serial interfaces are issued on peripheral initiative to the hardware levels E 2 or E 3 by peripheral interrupt requests PU 2 or PU 3. Programs specific to the individual hardware levels process PU 2 and PU 3 under operating system management.

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