GE VMIVME-7807-412010 Gas turbine signal module

In this chapter we describe: block transfer programming sample programs in the PLC-2, PLC-3 and PLC-5 processors Your module communicates with the processor through bidirectional block transfers. This is the sequential operation of both read and write block transfer instructions. The following example programs accomplish this handshaking routine. These are minimum programs; all rungs and conditioning must be included in your application program. You can disable BTRs, or add interlocks to prevent writes if desired. Do not eliminate any storage bits or interlocks included in the sample programs. If interlocks are removed, the program may not work properly

Optionally, the block transfer write 

(BTW) instruction is initiated when the module is first powered up, and subsequently only when the programmer wants to write a new configuration to the module. At all other times the module is basically in a repetitive block transfer read (BTR) mode. Your module will work with a default configuration of all zeroes entered in the configuration block. See the configuration default section to understand what this configuration looks like. Also, refer to Appendix B for example configuration blocks and instruction addresses to get started. The following example programs illustrate the minimum programming required for communication to take place.

PLC2 Family Sample Program Structure

The VHSC module is located in rack 1, module group 0, slot 0. The data address 030 is among the first available timer/counters used for block transfer. The default block length of 0 results in a 18 word block transfer read. The module status data is returned to the processor starting at address 301. If a block length other than 0 is specified for the BTR or BTW the BTR and BTW cannot be enabled during the scan.

The VHSC module is located in rack 1, module group 0, slot 0. The data address 031 is among the first available timer/counters used for block transfer. The default block length of 0 results in a 64 word block transfer write. The module configuration data is stored starting at address 201. The preconditions could also include the configuration bit (word 1, bit 0) to limit the block transfer write.

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