GE IS200ITBAG1A Thermocouple output card

The table below shows all of the hardware states readable or writable by a shader program.Points to the memory address of the next shader instruction to execute.Local data share is a scratch RAM with built-in arithmetic capabilities that allow data to be shared between threads in a workgroup.A bit mask with one bit per thread, which is applied to vector instructions and controls that threads execute and that ignore the instruction.A bit mask with one bit per thread; it holds the result of a vector compare operation.Temporary register for shader operations. For example, can hold a pointer to memory used by the trap handler.

Vector memory instruction count

Counts the number of VMEM store instructions issued but not yet completed. EXPCNT Export Count 3 Counts the number of Export and GDS instructions issued but not yet completed. Also counts VMEM writes that have not yet sent their write-data to the last level cache. LGKMCNT LDS, GDS, Constant and Message count 4 Counts the number of LDS, GDS, constant-fetch (scalar memory read), and message instructions issued but not yet completed.

Program Counter (PC) 

The program counter (PC) is a byte address pointing to the next instruction to execute. When a wavefront is created, the PC is initialized to the first instruction in the program. The PC interacts with three instructions: S_GET_PC, S_SET_PC, S_SWAP_PC. These transfer the PC to, and from, an even-aligned SGPR pair. Branches jump to (PC_of_the_instruction_after_the_branch + offset). The shader program cannot directly read from, or write to, the PC. Branches, GET_PC and SWAP_PC, are PCrelative to the next instruction, not the current one. S_TRAP saves the PC of the S_TRAP instruction itself.

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