GE IS200TRPAH1A Pulse output card

Scalar ALU (SALU) instructions operate on a single value per wavefront. These operations consist of 32-bit integer arithmetic and 32- or 64-bit bit-wise operations. The SALU also can perform operations directly on the Program Counter, allowing the program to create a call stack in SGPRs. Many operations also set the Scalar Condition Code bit (SCC) to indicate the result of a comparison, a carry-out, or whether the instruction result was zero.The lists of similar instructions sometimes use a condensed form using curly braces { } to express a list of possible names. For example, S_AND_{B32, B64} defines two legal instructions: S_AND_B32 and S_AND_B64.

Valid operands of SALU instructions are: 

• SGPRs, including trap temporary SGPRs. 

• Mode register. 

• Status register (read-only). 

• M0 register. 

• TrapSts register. 

• EXEC mask. • VCC mask. • SCC. 

• Inline constants: integers from -16 to 64, and a some floating point values. • VCCZ, EXECZ, and SCC. 

• Hardware registers. • 32-bit literal constant.

The SALU cannot use VGPRs or LDS. 

SALU instructions can use a 32-bit literal constant. This constant is part of the instruction stream and is available to all SALU microcode formats except SOPP and SOPK. Literal constants are used by setting the source instruction field to "literal" (255), and then the following instruction dword is used as the source value. If the destination SGPR is out-of-range, no SGPR is written with the result. However, SCC and possibly EXEC (if saveexec) will still be written. If an instruction uses 64-bit data in SGPRs, the SGPR pair must be aligned to an even boundary. For example, it is legal to use SGPRs 2 and 3 or 8 and 9 (but not 11 and 12) to represent 64-bit data.

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