ABB DSMD 113 5736045-N Thermal resistance module

The Write Request PDU is used to change the contents of one or more contiguous groups of memory on a specific peer controller. The header defines parameters which apply to all of the individual cell references in the message. Each cell reference specifies an offset into the specified exchange or targetspecific address, the number of bytes to write, and the data. Each data field must be padded to the nearest 4-byte boundary. Based on the address type, the Domain ID must contain an Exchange and Producer ID or target-specific address which is valid on the destination node. A Write Request sent from a requesting node must be followed by a Write Response message from the responding node. See the discussion in the section entitled Exchange Data Handling for information about coherency in the write.

Write Response 

The Write Response is returned from a destination controller in response to a Write Request message. It serves as an acknowledgment for the original request. A positive response indicates that all of the data has been written to the responding device. An error response indicates that one or more of the transfers to the responding device failed. Responders shall use all available means to assure that a write is performed in its entirety or not performed at all. Requesting applications are advised that if partial failures of the write can cause problems with the control algorithm, they should include only one cell in each write to assure complete knowledge of the disposition of the Write Request.

Masked Write Request

 The Masked Write Request PDU is used to change individual bits in one or more bytes in the destination controller. The header defines parameters which apply to all of the individual cell references in the message. Each cell reference specifies which bits to change in the byte specified by the offset given. Based on the address type, the Domain ID must contain an Exchange and Producer ID or target-specific address which is valid on the destination node. A Masked Write Request sent from a requesting node must be followed by a Masked Write Response message from the responding node. Some devices may not support writing individual bits and others may support writing only one bit at a time. Such devices shall return a status of MEMORY_ACCESS_ERROR for masked write attempts that they do not support.

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