ASEA BROWN BOVERI 803430-8S Robot module

J19 defines the state of the snoop control bus when an IP DMA controller is local bus master. J19 pins 1 and 2 enable/disable the Snoop Control signal on the MC68060 processor (pins 3-4 have no function on MVME172LX boards). For the MVME172LX, shorting pins 1-2 enables snooping. Leaving pins 1-2 disconnected (the factory configuration) inhibits snooping. With snooping enabled, the snoop signal to the MC68060 processor is driven low during IP DMA operations. EPROM/Flash Configuration Header (J20) The MVME172LX can be ordered with 2MB of Flash memory and two EPROM sockets ready for the installation of EPROMs, which may be ordered separately. The EPROM locations are standard JEDEC 32-pin DIP sockets that support three jumper-selectable densities (256 Kbit x 8; 512 Kbit x 8 — the factory default; 1 Mbit x 8) and which in addition permit disabling of the Flash memory.

Memory Mezzanine Options 

Two 100-pin connectors (J15 and J22) are provided on the MVME172LX to accommodate optional memory mezzanine boards. Two memory mezzanine options are available for the MVME172LX: 

❏ 4, 8, 16MB parity DRAM 

❏ 4, 8, 16, 32, 64MB ECC DRAM The mezzanine boards may either be used individually or be combined in a stack (not more than two deep). The following connector options govern stacking arrangements: 

❏ The 4, 8, and 16MB parity DRAM board has connectors on the bottom only; it must be either the only mezzanine or the upper mezzanine.

Installation Instructions

 This section covers: 

❏ Installation of IndustryPacks (IPs) on the MVME172LX 

❏ Installation of the MVME172LX in a VME chassis 

❏ System considerations relevant to the installation. Ensure that EPROM devices are installed as needed. Ensure that all header jumpers are configured as desired.

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