Each module has the Ethernet Station Address displayed on a label attached to the VMEbus P2 connector. In addition, the six bytes including the Ethernet address are stored in the configuration area of the BBRAM. That is, 08003E2xxxxx is stored in the BBRAM.
❏ At an address of $FFFC1F2C, the upper four bytes (08003E2x) can be read.
❏ At an address of $FFFC1F30, the lower two bytes (xxxx) can be read. The MVME187 debugger has the capability to retrieve or set the Ethernet address. If the data in the BBRAM is lost, the user should use the number on the VMEbus P2 connector label to restore it.
Buffer Overruns Because the 82596CA has small internal buffers and the VMEbus has an undefined latency period, buffer overrun may occur if the DMA is programmed to access the VMEbus. Therefore, the 82596CA should not be programmed to access the VMEbus. Support functions for the 82596CA are provided by the PCCchip2. Refer to the 82596CA user's guide for detailed programming information.
SCSI Interface
The MVME187 provides for mass storage subsystems through the industry-standard SCSI bus. These subsystems may include hard and floppy disk drives, streaming tape drives, and other mass storage devices. The SCSI interface is implemented using the NCR 53C710 SCSI I/O controller. Support functions for the 53C710 are provided by the PCCchip2. Refer to the 53C710 user's guide for detailed programming information. SCSI Termination Because this board has no provision for SCSI termination, you must ensure that the SCSI bus is terminated properly. ❏ If the SCSI bus ends at the P2 Adapter, termination resistors must be installed on the R1, R2, and R3 sockets using three 8- pin SIP resistors. Note: +5V power to the SCSI bus TERM power line and termination resistors is provided through a fuse located on the P2 transition board. ❏ If there are additional SCSI mass storage devices in your system, make sure that terminators are installed on the last device in the SCSI chain.
Local Resources
The MVME187 includes many resources for the local processor. These include tick timers, software programmable hardware interrupts, watchdog timer, and local bus timeout. Programmable Tick Timers Four 32-bit programmable tick timers with 1 µs resolution are provided, two in the VMEchip2 and two in the PCCchip2. The tick timers can be programmed to generate periodic interrupts to the processor. Watchdog Timer A watchdog timer function is provided in the VMEchip2. When the watchdog timer is enabled, it must be reset by software within the programmed time or it times out. The watchdog timer can be programmed to generate a SYSRESET signal, local reset signal, or board fail signal if it times out.
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