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WOODWARD 5466-074 governor

WOODWARD 5466-074 governor

WOODWARD 5466-074 governor

Beginning address of Local Memory. It must be a multiple of the Local Memory board size, starting with 0. The Bug will set up hardware address decoders so that Local Memory resides as one contiguous block at this address. Default is $0.You are prompted twice, once for each possible MVME187 memory mezzanine board. Default is the calculated size of the memory board.Slave address decoders setup. The slave address decoders are used to allow another VMEbus master to access a local resource of the MVME187. There are two slave address decoders. They are set up as follows.Ending address of the local resource that is accessible by the VMEbus, as viewed by the VMEbus. Default is the end of calculated memory.

This register will allow the VMEbus address and the local address to be different. The value in this register is the base address of the local resource that is associated with the starting and ending address selection from the previous questions. Default is $0.

Meaning of Default

This register defines which bits of the Translation Address are significant. A logical one "1" indicates significant address bits, logical zero "0" is nonsignificant. The non-significant bits will come from the VMEbus address that accesses the local resource. Normally, MS bits will be set, down to the size of memory to be accessed. Default is $0.Defines the access restriction for the address space defined with this slave address decoder. Default is $01FF. See description of VMEchip2 bits in Single Board Computer Programmer’s Reference Guide.Base address of the VMEbus resource that is accessible from the local bus. Default is the end of calculated local memory.

Master Address Translation

This register will allow the VMEbus address and the local address to be different. The value in this register is the base address of the VMEbus resource that is associated with the starting and ending address selection from the previous questions.This register defines which bits of the Translation Address are significant. A logical one "1" indicates significant address bits, logical zero "0" is nonsignificant. The non-significant bits will come from the local bus address that accesses the VMEbus. Normally MS bits will be set, down to the size of memory to be accessed This controls the VMEbus timeout when this MVME187 is the system controller

                                                         

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