WOODWARD 5466-425 Input expansion module

If one terminal is to be used as the 188Bug system console, it must be connected either through the cable to pins 1 through 9 of J4 on the MVME188A, or to the default debug port marked "console" on the MVME714M front panel. Note that the EIA-232-D ports are also made available at rows A and C of P2 of the MVME188A system controller board at the backplane. Refer to Table 2-4. Set up the terminal as follows: 

• eight bits per character 

• one stop bit per character • parity disabled (no parity) 

• baud rate 9600 baud After power-up, the baud rate of the debug port can be reconfigured by using the Port Format (PF) command of the 188Bug debugger.

System Considerations 

The MVME188A needs to draw power from both Pl and P2 of the VMEbus backplane. P2 is also used for the upper 16 bits of data for 32-bit transfers, and for the upper 8 address lines for extended addressing mode. The MVME188A may not operate properly without all its boards (system controller, memory, and main logic) connected to Pl and P2 of the VMEbus backplane. Whether the MVME188A operates as a VMEbus master or as a VMEbus slave, it is configured for 32 bits of address and for 32 bits of data (A32/D32). However, it handles Al6 or A24 devices in the address ranges indicated in Chapter 3. DB and/or Dl6 devices in the system must be handled by the MC88100 software. Refer to the memory maps in Chapter 3.

Note that the MVME188A contains no parallel ports.

 To use a parallel device, such as a parallel printer, with the MVME188A, it is necessary to add a module such as the MVME335 Serial and Parallel I/O Module to the system. If the MVME188A tries to access offboard resources in a non-existent location, and is not system controller, and if the system does not have a global bus time-out, the MVME188A waits forever for the VMEbus cycle to complete. This would cause the system to hang up. There is only one situation in which the system might lack this global bus time-out: the MVME188A is not the system controller, and there is no global bus time-out elsewhere in the system. Multiple MVME188A modules may be configured into a single VME card cage. Thus, multiple processors may be on one MVME188A, or on several MVME188As, or both. In general, hardware multiprocessor features are supported. Thus, VMEbus accesses to local memory are retried to insure cache coherency. Most MVME188A resources are accessible from the VMEbus.

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