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WOODWARD 5500-018 Control output module

WOODWARD 5500-018 Control output module

WOODWARD 5500-018 Control output module

The yellow FAIL LED is illuminated whenever the MVME188A is driving the VMEbus SYSFAIL* line, or would drive it if the ISF bit was not set in the Global Control and Status Register (GCSR). This is caused by an asserted DRVSF* bit in the UCSR. (An expired watchdog timer, if it is enabled, causes DRVSF* to be asserted if the WDA[l:O] and EWDTO bits of the UCSR allow a reset to be generated by the watchdog timer.) HALT Indicator 052 Either of two reset sources cause illumination of the yellow HALT LED: a local reset (POR* or LRST* is asserted on the MVME188A) or a system reset (SYSRESET* is asserted on the VMEbus). If the R&H bit of the GCSR is set, local reset will keep the HALT LED lit. Because the MC88100 does not have a ''halt" state, reset is the only case in which this LED is illuminated.s.

RUN Indicator 053

 The green RUN LED illuminates on any access of . local memory (DRAM) or system controller board resources (ROM, SRAM, etc), that is, whenever any device is Being accessed on the MVME188A local bus (slave bus) (MBSEL[3:0]*, USEL*, or UCCHB* asserted). It is also lit whenever the MVME188A accesses the VMEbus. MEM ERROR Indicator 051 The yellow MEM ERROR LED is on the front panel of the 32MB ECC DRAM memory board used in some MVME188As. Uncorrectable multiple·bit errors which are detected by the Am29C660 error detection and correction circuits (EDCs) on the board generate a bus error on the slave bus. Status is set indicating the source of the error and the yellow MEM ERROR LED is illuminated. Clearing the ECC CSR bit 31 or using system reset can switch the LED to the off state.

MVME188A Memory Maps 

The address maps are defined in the following sections. The P bus map shows how the CMMUs respond to CPU addresses. The M bus maps show how the MVME188A hardware responds to addresses generated by the CMMUs. The VMEbus slave address map shows how the MVME188A responds to VMEbus addresses generated by another master. Note that there is one case where the MVME188A can "address itself": when an on-board GCSR access is performed via VMEbus A16 space. (Refer to Chapter 4 for GCSR details.)

                                                         

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