HIMA F1101 Drive input module

The GLBRES register is not actually a register; when this location is written to, a SRST is generated. This resets the entire system, including the VMEbus. Note that the VMEbus is reset even if the MVME188A is not system controller.Because the GCSR can be used in configuring and bootstrapping the MVME188A, 12 switches are provided which allow the base address of the GCSR to be located anywhere within the VMEbus A16 address space, as desired. Also, to provide system development flexibility, the switches are accessible through the front panel. The GCSR is the only VMEbus A16 resource on the MVME188A RISC microcomputer.

VMEbus System Controller 

The MVME188A RISC microcomputer has a VMEbus system controller which may be enabled by means of a switch accessible through the front panel. Several features are offered by the system controller. A system clock driver within the system controller circuitry drives the VMEbus SYSCLK line with a 16 Mhz clock signal. This signal is not used by ~he MVME188A. When the MVME188A is configured to be system controller, its power monitor is enabled to drive the VMEbus SYSRESET* line. To determine when to assert SYSRESET*, the power monitor reads the VMEbus ACFAIL* line. In addition, the power monitor guarantees that SYSRESET* will be asserted for at least 200 ms after the +5 Vdc line reaches a voltage of +4.75 Vdc.

Timekeeper RAM 

The battery backed up SRAM and clock calendar functions provided by the MVME188A are implemented with the MK48T02 Timekeeper RAM. This device offers battery-backed-up operation (up to 11 years if the RTC is off), a clock/calendar function, 2KB of SRAM and circuitry for automatically and safely switching to battery power when system power is removed.As determined by the state of the RONR bit in the UCSR, the arbiter functions either as a PRI or as an RRS arbiter. In the PRI mode, Bus Clear operation is supported; i.e., BCLR* is asserted when a request higher in priority than the current active bus grant level occurs. The arbiter includes a function for generation of a local interrupt following a bus grant timeout. If the arbiter grants the VMEbus to a requester which does not drive BBSY* low within one second, the arbiter withdraws the bus grant and interrupts the local processor. The interrupt acknowledge out (IACKOUT*) line to the local interrupter is driven by the !ACK daisy chain driver whenever IACKIN* is low followed by the assertion of either data strobe

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