HIMA F2108 Analog servo system

Status Indicator LED The 32MB ECC DRAM memory board front panel contains an LED that indicates MEM ERROR. Refer to Chapter 3 for detailed information. Onboard Switch The 32MB ECC DRAM memory board contains an eight-segment switch SWl. Its segments are used to select the memory board's position in the MVME188A slave bus memory map, and to decode and set addresses for the Control and Status Registers (CSRs) and the diagnostic latch registers. Chapter 2 has further information on these switch segments. The registers are described in detail in the following sections of the present chapter

32MB ECC DRAM Memory Board Registers 

The diagnostic latch register is described in the Am29C660 data sheet listed in Chapter 1. The CSR is described as follows. Programming the Control and Status Register The control and status register (CSR) is used to program the operation of the MVME288EC-32. This register is read/write. Various operating modes can be programmed. They include error checking and correcting on or off, diagnostic modes, and fast refresh cycling. The CSR register definition in Table 4-15 has four lines. Line 1 shows the bits defined by this table. Line 2 defines the name of the bits in the register. Line 3 defines the operations possible on the register bits as follows.

The DBE bit indicates that a double-bit error was detected. 

A bus error {M bus error) is generated for this cycle. Reset to zero. Bit 31 is cleared by writing a 1 to that location. DBE will also drive the MEM ERROR LED. The DRAM array is tested for errors across two words. It is possible to access a word which does not have an error but still generate an error. This can be prevented by initializing all of memory before enabling error checking. SOD[6 .. 0] are the syndrome bits for the odd bank of memory. When the field is non-zero, an error has been detected. Refer to a table in the Am29C660 data sheet for the error definition. The first error encountered will freeze the state of this field. Examining the CSR will allow the syndrome bits of the next error to be captured.

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