HIMA F3117  Integrated circuit module

The PCNFA register defines the operation of the P bus "A" decoder. The decoder function (and hence the PCNFA register bit definition) changes with the HYPERmodule configuration. The PCNFB register defines the operation of the P bus ''B" decoder. The decoder function (and hence the PCNFB register bit definition) changes with the HYPERmodule configuration. For a given HYPERmodule configuration, both P bus decoders are identical. Bit assignments and functions for PCNFA and PCNFB are contained in the following text and tables. Bit assignments for the PCNFA register are shown in Table 4-18; for the PCNFB register in Table 4-25. PCNFA and PCNFB are cleared by SRST or LRST. Using HYPERmodule configuration 1 (HM88K-2P128 or HM88K-2P512) (two CPUs, eight CMMUs), PCNFA controls the P bus mapping of both code and data CMMUs 0 and 1 on CPU 0. Code and data CMMUs 2 and 3 (on CPU 1) are controlled by PCNFB

Using HYPERrnodule configuration 2

 (HM88K-1P128 or HM88K-1P512) (one CPU, eight CMMUs), PCNFA controls the P bus mapping of all four code CMMUs. The data CMMU mapping is controlled by PCNFB. Using HYPERrnodule configuration 6 (HM88K-1P64 or HM88K-1P256) (one CPU, four CMMUs), PCNFA also controls the P bus mapping of both code and data CMMUs; PCNFB is not used with this HYPERrnodule configuration. HYPERrnodule configurations 0, 5, and A (HM88K-4P128 or -4P512, -2P64 or 2P256, and -1P32 or 1Pl28, respectively) do not implement either P bus decoder "A" or "B", and consequently all writes. to the PCNFA and PCNFB registers will have no effect on the P bus mapping. The PCNFA and PCNFB registers can still be accessed in these configurations; the contents are simply ignored.

EXTAM Register 

The extended address-modifier register supplies AMO through AM3 address modifiers to the VMEbus when the MVME188A is bus master. Bit assignments are shown in Table 4-31. (The upper two address modifier bits (AM4 and AMS) are derived from the M bus decoder for the selected page per the following information.) This register is unaffected by SRST or LRST. It should always be initialized before the MVME188A accesses any VMEbus resource.

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