ICS TRIPLEX T3150A Channel output module

Good programming practice dictates that only one MPU at a time have control of the MVME2603/2604 control registers. Of particular note are: 

❏ Registers that modify the address map 

❏ Registers that require two cycles to access 

❏ VMEbus interrupt request registers

The Winbond W83C553 PIB device supplies the PCI arbitration support for these seven types of devices. The PIB supports flexible arbitration modes of fixed priority, rotating priority, and mixed priority, as appropriate in a given application. Details on PCI arbitration can be found in the MVME2600 Series Single Board Computer Programmer’s Reference Guide, listed in Appendix D, Related Documentation.

PCI Arbitration 

There are seven potential PCI bus masters on the MVME2603/2604 single board computer: 

❏ Raven ASIC (MPU/PCI bus bridge controller) 

❏ Winbond W83C553 PIB (PCI/ISA bus bridge controller) 

❏ DECchip 21140 Ethernet controller 

❏ SYM53C825A SCSI controller 

❏ Universe ASIC (PCI/VME bus bridge controller) 

❏ PMC Slot 1 (PCI mezzanine card) ❏ PMC Slot 2 (PCI expansion)

Interrupt Handling 

The Raven ASIC, which controls PHB (PCI Host Bridge) MPU/local bus interface functions on the MVME2603/2604, performs interrupt handling as well. Sources of interrupts may be any of the following: 

❏ The Raven ASIC itself (timer interrupts or transfer error interrupts) 

❏ The processor (processor self-interrupts) 

❏ The Falcon chip set (memory error interrupts) 

❏ The PCI bus (interrupts from PCI devices) 

❏ The ISA bus (interrupts from ISA devices) Figure 2-3 illustrates interrupt architecture on the MVME2603/2604. For details on interrupt handling, refer to the MVME2600 Series Single Board Computer Programmer’s Reference Guide, listed in Appendix D, Related Documentation.

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