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ICS TRIPLEX T7150A Control card

ICS TRIPLEX T7150A Control card

ICS TRIPLEX T7150A Control card

The Raven bridge controller ASIC provides the bridge between the PowerPC microprocessor bus and the PCI local bus. Electrically, the Raven chip is a 64-bit PCI connection. Four programmable map decoders in each direction provide flexible addressing between the PowerPC microprocessor bus and the PCI local bus.

Under normal operation, the Flash devices are in “read-only” mode, their contents are pre-defined, and they are protected against inadvertent writes due to loss of power conditions. However, for programming purposes, programming voltage is always supplied to the devices and the Flash contents may be modified by executing the proper program command sequence. Refer to the third-party data sheet and/or to the PPCBug Firmware Package User’s Manual, listed in Appendix D, Related Documentation, for further device-specific information on modifying Flash contents.

Flash Memory 

The MVME2603/2604 base board has provision for 1MB of 16-bit Flash memory in two 8-bit sockets. The RAM200 memory mezzanine accommodates 4MB or 8MB of additional 64-bit Flash memory. The onboard monitor/debugger, PPCBug, resides in the Flash chips. PPCBug provides functionality for: 

❏ Booting the operating system 

❏ Initializing after a reset 

❏ Displaying and modifying configuration variables 

❏ Running self-tests and diagnostics 

❏ Updating firmware ROM

RAM200 Memory Module

 The RAM200 is the ECC DRAM memory mezzanine module that (together with an LED mezzanine and an optional PCI mezzanine card) plugs into the base board to make a complete MVME2603 or MVME2604 single board computer.RAM200 modules of 16, 32, 64, 128, or 256MB are available for memory expansion. The ECC DRAM is controlled by the Falcon memory controller chip set. The Falcon ASICs perform two-way interleaving, with double-bit error detection and single-bit error correction. In addition to the ECC DRAM, the RAM200 module supplies 4MB or 8MB of additional soldered-in 64-bit Flash memory. A jumper header (J10) tells the Falcon chip set where in memory to fetch the board reset vector. Depending on the configuration of J10, resets execute either from Flash memory bank A or from bank B.

                                                      

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