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FOXBORO FBM214 P0914XN Communication gateway module

FOXBORO FBM214 P0914XN Communication gateway module

FOXBORO FBM214 P0914XN Communication gateway module

s I/O on the MVME167 is connected to the VMEbus P2 connector. The main board is connected to the transition modules through a P2 adapter board and cables.The MVME712X transition modules provide configuration headers and provide industry standard connectors for the I/O devices. Refer to Figure 3-3 on page 3-21. ❏ The MVME167 supports the transition modules MVME712- 12, MVME712-13, MVME712M, MVME712A, MVME712AM, and MVME712B (referred to in this manual as MVME712X, unless separately specified).

The MVME167 board features several Application Specific Integrated Circuits (ASICs) including: 

❏ VMEchip2 

❏ PCCchip2

❏ MEMC040 

❏ MCECC All programmable registers in the MVME167 that reside in ASICs are covered in the Single Board Computers Programmer's Reference Guide.Provides the VMEbus interface. The VMEchip2 includes: ❏ Two tick timers ❏ A watchdog timer ❏ Programmable map decoders for the master and slave interfaces, and a VMEbus to/from local bus DMA controller 

❏ A VMEbus to/from local bus non-DMA programmed access interface ❏ A VMEbus interrupter 

❏ A VMEbus system controller ❏ A VMEbus interrupt handler ❏ A VMEbus requester.

MEMC040 Memory Controller ASIC 

The MEMC040 memory controller ASIC provides the programmable interface for the parity-protected DRAM mezzanine board. MCECC Memory Controller ASIC The MCECC memory controller ASIC provides the programmable interface for the ECC-protected DRAM mezzanine board. Functional Description The major functional blocks of the MVME167 covered in this section are: 

❏ Front panel switches and LED indicators 

❏ Data bus structure ❏ MC68040 CPU 

❏ EPROM ❏ SRAM ❏ Onboard DRAM

                                                      

product application

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