TRICONEX 3805EN Adjustment control module

The VMIVME-5576 allows up to 256 VMEbus chassis to be linked together in a sequential fashion. Data written to any node appears in all other nodes some period of time later. The link between the nodes is two fiber-optic cables which pass address, data, and interrupt information between adjacent boards on the link. The VMIVME-5576 allows a user to Read or Write the RAM address space at will. All memory Writes are stored in SRAM on the board and also put in a FIFO to be broadcast to all other nodes. An interrupt command may also be written to any or all chassis by writing a data word into a specific location in RAM. The data value written dictates which node(s) will receive the interrupt. The interrupt is sent out in the order the data was received from the VMEbus, so if a block of data was written to the board before the interrupt command is sent, then the data will be broadcast to all boards before the interrupt command is broadcast.

BASE ADDRESS SELECTION 

The base address of the VMIVME-5576 is jumper-selectable. Once the base address is established, all other writes to the VMIVME-5576 will be relative to the base address. Each node on the link may have a different base address. Only the relative offset to the base address is passed across the link. Thus, each board on the link may have a different VMEbus address and addressing mode.

FIBER-OPTIC LINK SPEED SELECTION

 At full speed the link can support a 6.2 Mbyte data transfer rate. However, the high-speed serial fiber optic’s bit error rate may result in erroneous data being transferred. A slowdown option has been included to allow the link to be slowed down by a factor of two. VME interface response time will not be affected by the data link slowdown. All transfer errors are detectable via parity checking and on-board receiver error detection circuitry. The slowdown mode results from sending each data twice.

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