TRICONEX 4400 Channel output module

By operating in the “timed-burst mode”, the data buffer can be scanned (filled) repetitively at specific intervals, or a single scan can be initiated after the first interval. See Figure 3-1 for a functional block diagram of the Interval Timer circuitry. The timed-burst mode is selected as follows: • Single Scan/Burst CCR D07 = 1, CCR D06 = 0 • Interval Timer enabled CSR D13 = 1 When operating in this mode, a buffer scan will occur at the end of the time interval programmed into the timer.

VMIVME-3122 Timer Functional Block Diagram

 If CSR D11 is cleared, Timer 0’s output is selected as the timer’s output and the product of the timer’s output will be: Formula for 16-bit Timer: T0 = Desired Time/.000000160 Where:T0 = Timer 0’s 16-bit value in decimal (1 to 65,535). Timer = Period of time out in µs up to 10.4856 ms. If CSR D11 is set, then Timer 1’s output is selected as the timer’s output and the output of Timer 0 is used as the clock for Timer 1. The period of the timer’s output will be: Formula for 2 Cascaded 16-bit Timers: Desired Time/.000000160 = T1 x T0

Data Block 

A complete set of digitized values for all active input channels is a data block, and it can consist of 1, 8, 16, 32, or 64 channels. Block size is controlled by bits D05 - D00 in the CCR, as shown in Table 3-7 on page 53. Data words within a block are organized according to how the Group Configuration bits in the CCR are programmed. Table 3-7 on page 53 lists the combinations of buffer and block size available.

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