ABB PFSK107 PFSK 107 Pulse input module

Configuration EEPROM After power-on or PCI reset the PCI9030 loads initial configuration register data from the on board configuration EEPROM. The configuration EEPROM contains the following configuration data:  Address 0x00 to 0x27 : PCI9030 PCI Configuration Register Values 

 Address 0x28 to 0x87 : PCI9030 Local Configuration Register Values 

 Address 0x88 to 0xFF : Reserved See the PCI9030 Manual for more information.

Local Software Reset

 The PCI9030 Local Reset Output LRESETo# is used to reset the on board local logic. The PCI9030 local reset is active during PCI reset or if the PCI Adapter Software Reset bit is set in the PCI9030 local configuration register CNTRL (offset 0x50). CNTRL[30] PCI Adapter Software Reset: Value of 1 resets the PCI9030 and issues a reset to the Local Bus (LRESETo# asserted). The PCI9030 remains in this reset condition until the PCI Host clears this bit. The contents of the PCI9030 PCI and Local Configuration Registers and the PCI9030 PCI Interface are not reset.

Hardware Initialization

 The COM20020 ARCNET Controller, which is used on the TPMC815, is able to work with different CPU bus structures. The COM20020 device learns the used bus structure by monitoring the first bus cycles which address the COM20020. To initialize the COM20020 ARNET Controller to the right CPU bus structure the software must do the following accesses to the COM20020 immediately after a system reset: 1. Write 0x55 to the Command Register at byte offset 0x01. 2. Read the Diagnostic Status Register at byte offset 0x01. If after a reset, the COM20020 is not initialized with the sequence listed above, the ARCNET PMC will not operate properly.

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