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ABB SDCS-PIN-24 Logic control card

ABB SDCS-PIN-24 Logic control card

ABB SDCS-PIN-24 Logic control card

Writing a 1 to I2 C Register Bit CTRLB[7] causes the LOL pin, Pin 16, to become a static LOL indicator. In this mode, the LOL pin mirrors the contents of the MISC[4] bit and has the functionality described in the previous paragraph.The CTRLB[7] bit defaults to 0. In this mode, the LOL pin operates in the normal operating mode, that is, it is asserted only when the ADN2816 is in acquisition mode and deasserts when the ADN2816 has reacquired lock.

The time to detect lock to harmonic is 216 × (Td/ρ) where: 1/Td is the new data rate. For example, if the data rate is switched from OC-12 to OC-3, then Td = 1/155.52 MHz. ρ is the data transition density. Most coding schemes seek to ensure that ρ = 0.5, for example, PRBS, 8B/10B. When the ADN2816 is placed in lock to reference mode, the harmonic detector is disabled.

HARMONIC DETECTOR

 The ADN2816 provides a harmonic detector, which detects whether or not the input data has changed to a lower harmonic of the data rate that the VCO is currently locked onto. For example, if the input data instantaneously changes from OC-12, 622.08 Mb/s to an OC-3, 155.52 Mb/s bit stream, this could be perceived as a valid OC-12 bit stream, because the OC-3 data pattern is exactly 4× slower than the OC-12 pattern. Therefore, if the change in data rate is instantaneous, a 101 pattern at OC-3 would be perceived by the ADN2816 as a 111100001111 pattern at OC-12. If the change to a lower harmonic is instantaneous, a typical CDR could remain locked at the higher data rate.

The ADN2816 implements a harmonic detector

 that automatically identifies whether or not the input data has switched to a lower harmonic of the data rate that the VCO is currently locked onto. When a harmonic is identified, the LOL pin is asserted and a new frequency acquisition is initiated. The ADN2816 automatically locks onto the new data rate, and the LOL pin is deasserted. However, the harmonic detector does not detect higher harmonics of the data rate. If the input data rate switches to a higher harmonic of the data rate, then the VCO is currently locked onto, the VCO loses lock, the LOL pin is asserted, and a new frequency acquisition is initiated. The ADN2816 automatically locks onto the new data rate.

                                           

Company introduction

Temporal Ming sheng automation equipment co., LTD. Was established in April 02, 2021, registered jiujiang ruichang city in jiangxi province, east yi road no. 23 lake farmers 401 mall, the legal representative person Zhou Zuochen.

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