ABB SDCS-UCM-1 Thermocouple output module

Prior to reading back the data rate using the reference clock, the CTRLA[7:6] bits must be set to the appropriate frequency range with respect to the reference clock being used. A fine data rate readback is then executed as follows: 1. Write a 1 to CTRLA[1]. This enables the fine data rate measurement capability of the ADN2816. This bit is level sensitive and does not need to be reset to perform subsequent frequency measurements. 2. Reset MISC[2] by writing a 1 followed by a 0 to CTRLB[3]. This initiates a new data rate measurement. 3. Read back MISC[2]. If it is 0, the measurement is not complete. If it is 1, the measurement is complete and the data rate can be read back on FREQ[22:0]. The time for a data rate measurement is typically 80 ms.

For example

 if the reference clock frequency is 32 MHz, SEL_RATE = 1, since the CTRLA[7:6] setting is [01], because the reference frequency falls into the 20 MHz to 40 MHz range. Assume for this example that the input data rate is 622.08 Mb/s (OC-12). After following Step 1 through Step 4, the value that is read back on FREQ[22:0] = 0x9B851, which is equal to 637 × 103 . Plugging this value into the equation yields If subsequent frequency measurements are required, CTRLA[1] should remain set to 1. It does not need to be reset. The measurement process is reset by writing a 1 followed by a 0 to CTRLB[3]. This initiates a new data rate measurement. Follow Step 2 through Step 4 to read back the new data rate.

Additional Features

 Available via the I2 C Interface Coarse Data Rate Readback The data rate can be read back over the I2 C interface to approximately ±10% without the need of an external reference clock. A 9-bit register, COARSE_RD[8:0], can be read back when LOL is deasserted. The eight MSBs of this register are the contents of the RATE[7:0] register. The LSB of the COARSE_RD register is Bit MISC[0]. Table 13 provides coarse data rate readback to within ±10%.

A frequency acquisition can be initiated by writing a 1 followed by a 0 to the I2 C Register Bit CTRLB[5]. This initiates a new frequency acquisition while keeping the ADN2816 in the operating mode that it was previously programmed to in Registers CTRL[A], CTRL[B], and CTRL[C].

Company introduction

Temporal Ming sheng automation equipment co., LTD. Was established in April 02, 2021, registered jiujiang ruichang city in jiangxi province, east yi road no. 23 lake farmers 401 mall, the legal representative person Zhou Zuochen.

[Main Products]

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