MITSUBISHI MR-J2S-20A CPU controller

MITSUBISHI MR-J2S-20A CPU controller

Level-Sensitive/Edge-Triggered Mode Control – If you clear this bit to zero, the module is level sensitive and will be in Hold mode when the selected Hold Trigger signal is high and in Track mode when the selected Hold Trigger signal is low. If you set the bit to one, the module becomes edge sensitive and enters Hold mode on the rising edge of the selected Hold Trigger signal and enters Track mode after the number of SCANCON pulses determined by SCCNT<7..0>. 11 HTRIGINEN* HOLDTRIG Input Enable – Determines whether HOLDTRIG is selected as the Hold Trigger signal. When you clear this bit to zero, HOLDTRIG is the Hold Trigger signal. When this bit is set to one, HOLDTRIG is not the Hold Trigger signal.

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