Detailed
PILZ 301120 Analog output module
The PILZ 301120 route one of each group of eight channels to the Programmable Gain Amplifier (PGA) multiplexers, which in turn selects an input to route to the PGA. Input address lines A0 and A1 control the input multiplexer, while A3, A4, and A5 select the PGA multiplexer input. Each input multiplexer has an individual enable signal which enables the multiplexer with the desired channel. Crosstalk and source impedance errors are minimized by the input OP AMP Buffers. The buffers provide a constant low impedance to the multiplexer inputs. Each channel contains a buffer on each input line.
Gain Control The PGA applies a gain of x1 or x10 to the differential channel from the PGA multiplexer, and produces a single-ended output. PGA gain is selected by the GAIN_X1_L control line.
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