ABB PCD233 Logic control card

ABB PCD233 Logic control card

When SYSTEM RESET is applied to the PCD233, the Control Register and all converter flags are cleared to the LOW state ("0"). The clearing process is sequential and a delay of at least 50 µs should be allowed before attempting to control the board after a RESET has occurred. An independent BOARD RESET can be generated by setting the BOARD RESET control bit to "1."

Control of the analog input multiplexer configuration is provided by the three MODE selection bits: D8, D9, and D10 in the CSR. Table 4.4-1 lists the control codes for the available modes. Each mode is summarized here, and then it is described in detail in the section in which the mode is applied.

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