ABB YPQ201T 3ASD299001B2 Output logic module
The YPQ201T is a VLSI designed for a simple and efficient interface to the VMEbus. All data transfers between the YPQ201T and the VMEbus Central Processing Unit (CPU) are asynchronous to the system clock. The YPQ201T chip offers an elaborate interrupt scheme to provide fast interrupt response in real-time applications. The interrupt vector points to an interrupt service routine in the CPU memory. To service operations in both YPQ201T channels and to eliminate the necessity of writing a status analysis routine (as required for a polling scheme), the YPQ201T can modify the interrupt vector so it points to one of eight interrupt service routines.
If the status affects vector bit is high, the lower three bits of the vector returned during a read or IACK cycle are modified to reflect the highest priority interrupt pending in the SIO at that time. The upper five bits written to the Vector Register are unaffected. After a hardware reset, this register contains an "0F" HEX value which is the uninitialized interrupt vector assignment of the 680XX CPU.
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