RELIANCE 45C-340 Channel output module
The 45C-340 contains eight programmable read/write registers. There are four Control Registers (CR0 to CR3) that govern operation of this device. The other four (VR0 to VR3) are Vector Registers that contain the vector data used during an interrupt acknowledge cycle. Address and register bit definitions for the BIM Ei68C153 are shown in Table 3-6 on page 58. Control Registers There is a Control Register for each interrupt source, i.e., CR2 controls INT2 (0, and 1), CR3 controls INT3. CR0 and CR1 are not used.
Each interrupt input has its own associated Vector Register. Each register is 8 bits wide and supplies a data byte during its interrupt acknowledge cycle if the associated external/internal (X/IN (active low)) (Bit 05) Control Register bit is clear. This data can be status, identification, or address information depending on system usage. The information is programmed by the system user. Device reset When the 45C-340 is reset, the registers are set to a known condition. The Control Registers are set to all zeros (low). The Vector Registers are set to $0F. This value is the MC68000 vector for an uninitialized interrupt vector.
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