GE V7769 Combustion engine input card

GE V7769 Combustion engine input card

In addition to an I/O port address, an I/O device has a separate hardwareinterrupt line assignment. Assigned to each interrupt line is a correspondinginterrupt vector in the 256-vector interrupt table at $00000 to $003FF in memory.The 16 maskable interrupts and the single Non-Maskable Interrupt (NMI) arelisted in Table 2-3 along with their functions. Table 2-4 on page 38 details thevectors in the interrupt vector table. The interrupt number in HEX and decimalare also defined for real and protected mode in Table 2-4 on page 38.

The interrupt hardware implementation on the V7768/V7769 is standard forcomputers built around the PC architecture, which evolved from the IBM PC/XT.In the IBM PC/XT computers, only eight interrupt request lines exist, numberedfrom IRQ0 to IRQ7 at the Programmable Interrupt Controller (PIC). The IBM PC/AT computer added eight more IRQx lines, numbered IRQ8 to IRQ15, bycascading a second slave PIC into the original master PIC. IRQ2 at the master PICwas committed as the cascade input from the slave PIC. This architecture isrepresented in Figure 2-1 on page 42.

To maintain backward compatibility with PC/XT systems, IBM chose to use thenew IRQ9 input on the slave PIC to operate as the old IRQ2 interrupt line on thePC/XT Expansion Bus. Thus, in AT systems, the IRQ9 interrupt line connects tothe old IRQ2 pin (pin B4) on the AT Expansion Bus (or ISA bus)

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